Jobs for People with MS: National MS Society

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.

• 3 years of experience with hardware description languages (RTL) such as verilog and systemverilog.

• Experience in creating and using verification components and environments in standard verification methodology.

Preferred qualifications:

• Experience in RTL development for ASIC subsystems using System Verilog/UVM, and overall chip design flow.

• Experience with design management of SoCs in process nodes.

• Experience with Verification Techniques.

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

• Plan tasks, hold code and design reviews, contribute on sub-system/chip-level integration, and perform all the required verification tasks.

• Interact with the architecture team and develop implementation strategies to meet quality, schedule, and power performance areas for sub-system/chip-level integration.

• Plan SOC milestones and quality checks, and guide subsystem teams with SOC level requirements (e.g., IPXACT, CSR, Lint, CDC, SDC, UPF, etc.).

• Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.

• Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.