Jobs for People with MS: National MS Society

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ADTRAN, Inc. Principal FPGA Design Engineer - R003523 in Atlanta, Georgia

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Principal Tasks

Demonstrated ability to perform research and/or drive new technologies internally and represent this work externally within the industry Demonstrated ability to work at the architecture level in any area of the system or as a company level expert in several significant technology domains Considered a department, possibly company expert in multiple technical areas, and frequently consulted by other parts of the company for this expertise Provided consulting across the company for a significant technology domain to a number of different projects Recognized as an industry expert for a significant technology domain both internally and externally Provides technical leadership to a team of engineers to develop a portion of the system Participated in a least ten full Telecom/Datacom product design life cycles working in a variety of system areas or as an industry level expert in a significant technology domain in a number of different projects Capable of representing the company in a leadership role in industry forums such as standards committees, technical customer meetings, etc. Operating at the equivalent of an engineer with 17 plus years of relevant experience Reports to the Sr Director of ASIC/FPGA/IP Development. Provides technical expertise to ASIC/FPGA/IP development department of ADVA Optical Networking, Inc Mentors and provides leadership for Senior and Junior staff in technical issues to help them understand the architecture, design, processes, tools, etc. Technical responsibilities may include any of the following: provide resource estimates, develop device architectures, RTL coding, behavioral descriptions and modeling, test case and/or test bench development, logic synthesis, test vector generation, functional test coverage, formal analysis, thermal analysis, SSO, AC timing, DC characteristics, pinout, packaging, etc. Adheres to department procedures regarding computer file structure, design file management, device specifications, coding guidelines, and synthesis guidelines and file security Typically provides a Chip Design/Tool Driving Role. Follows and drives improvements to the Design and Verification Methodology Participated in a least seven full telecom/datacom product design life cycles working in multiple system areas. Capable of representing the Engineering department within company forums such as process discussions, customer support, etc Operating at the equivalent of an engineer with 15 plus years of relevant experience. Able to design new or make improvements to verification test benches and test cases help make detailed verification plans Collaborative and good communications skills Excellent debugging and problem solving skills Capable of working independently on the assigned design activities with minimal supervision Work effectively with internal designers and external contractors Quickly identify verification holes using tools and methods Self-starting, Highly Self Motivating

Supplementary Tasks: IP implementation and validation Scripting related to Perforce/Collabnet (Subversion) Provide assistance with new hire candidate interviews and hiring decisions Supporting existing products that are released in to production Assist in team building at other sites, Limited Travel, other duties as required Customers (Internal and External)

Internal Global FPGA/IP Development Manager Product Line Management, Systems Architecture, HW, SW, SIT Managers Relevant Project Manager HW/FW/SW Team Personnel

External Professional inter ction with EDA Companies, FPGA Companies, and other semiconductor, and electronic equipment suppliers, vendors, distributors and their representatives. Customer Support or others as required or needed

Skills / Qualifications / Training / Experience:

Preferred Degree Qualification: BS or MS degree in Electrical Engineering Preferred Years of Electrical Engineering experience: BS 15 years, MS 12 years No Agencies, legally authorized to work in the US Multiple previous experience with Large FPGA, ASIC, or ASSP designs Multiple previous experience verifying complex Application Specific Integrated Circuits/Field Programmable Gate Arrays (ASICs / FPGAs) using C/C ior System Verilog. Experience with building and setting up scalable simulation / verification environments ideally with OVM/UVM. Communicates and executes project requirement and technical strategy Ensures ADVA "ASIC/FPGA" Hybrid Methodology, and project specific design requirements will be met on schedule, and recommends improvements Channels technical expertise toward project goals consistently on complex projects of key value to the company Conducts critical design reviews at the IP or Chip level Technical/SOC Lead, some design, and a design resource to the SOC team Early Stage role in Chip Architecture in collaboration with System Architects and Product Line Marketing/Management and Global FPGA/IP Development manager Expert in multiple technical areas in ADVA products: OTN, Ethernet, Sonet/SDH, FEC, DSP industry standards Knowledge of PLLs, Clock and Reset and Hierarchical Architectures. Knowledge of IEEE/ITU-T/MEF/EFM Networking industry Standards Self-Starter, Highly Self...

Equal Opportunity Employer - minorities/females/veterans/individuals with disabilities/sexual orientation/gender identity

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